As a document which describes a circuit module which mounts a data processor and an SDRAM on a mounting substrate, there has been known Japanese Patent Laid-open 2001-177046. According to this document, the data processor having the BGA package structure is arranged at the center, the SDRAM is arranged around the data processor, and data terminals for the SDRAM are arranged at a center portion of a side of the BGA (Ball Grid Array) package. Output terminals of clocks, addresses and commands to the SDRAM are arranged at corner portions of the BGA package.
Further, in the international publication pamphlet of WO99/24896, there is a description with respect to wiring design which takes clock and address wiring at the time of connecting a microcomputer and a memory chip into consideration, wherein clock terminal is arranged at a center portion of a side of a package and addresses and data terminals are arranged on left and right sides of the clock terminal.